Anand saurabh's Job Requirements
Digital logic design engineer Job Required
| Name: | Anand saurabh |
| Job Title: | Digital logic design engineer |
| Expected Salary: | ₹111000 per month |
| Job Mode: | Full-Time |
| Skills: | Digital electronics , Verilog , VHDL, VIVADO, tcl ,STA ,CDC |
| Industry: | Accounting |
| Experience: | 3 Years |
| Job Search Reward: | ₹0 |
| WhatsApp Number: | |
| Phone Number: | 6202645845 |
| View Profile: | View Anand saurabh's Profile |
| Description | |
3h I am looking for digital design engineer (Frontend) role. Would love to work on core digital design topics like : a)CDC & STA b)Architecture for high performance , low power c)High speed source synchronous I/O interface d)open to any other digital design engineer role (Front-end ,ASIC/FPGA) I will be available after 2 weeks currently on notice period at AMD ,Hyderabad as an IP design engineer. Please share any relevant opportunity with me. Look forward for magic. : ) Regards, Anand Saurabh anand5370@gmail.com | |