Centre Notifies Semicon 2.0 Scheme With ₹1,27,500-Crore Outlay to Deepen Semiconductor Manufacturing

The Centre has officially notified the Semicon 2.0 scheme, setting into motion a ₹1,27,500-crore plan designed to deepen India’s semiconductor manufacturing and design ambitions. The formal Gazette notification follows the Union Cabinet's approval of the program.

The newly notified scheme details eligibility criteria, incentive structures, and implementation frameworks across the semiconductor value chain. This includes a 40 percent fiscal support on a pari-passu basis for silicon wafer fabs requiring a minimum investment of ₹20,000 crore, alongside specific incentives for chip design.

Semicon 2.0 is structured around six core pillars: the design of semiconductor IPs, chips, system-on-chips (SoCs), and modules of national importance; machines and materials; the establishment of additional fabs; the strengthening of the ATMP and OSAT industry; research and development for advanced semiconductor technologies; and talent development.

Union Minister of Electronics and IT Ashwini Vaishnaw stated that India reached its initial goal of training 85,000 semiconductor engineers in four years instead of ten, and has established a new target to develop an additional one lakh engineers. He noted that students from tier-II and tier-III cities have designed over 250 chips, and that commercial production in previous projects commenced within 13 months of groundbreaking.

According to the ministry, projects supported under Semicon 2.0 will typically have a duration of up to six years, while the application window will initially remain open for three years. The initiative is projected to create between 50,000 and 60,000 direct jobs. Close to 10 percent of the global semiconductor industry’s market is anticipated to be based in India in the coming years.

The initiative arrives as semiconductors function as a critical strategic resource globally. The artificial intelligence boom has driven high demand for advanced chips and memory, while supply chain vulnerabilities and shifting geopolitics have prompted global players to expand capacity and diversify production hubs.

S Krishnan, Secretary of the Ministry of Electronics and Information Technology (MeitY), noted that the primary objective of the scheme is to foster a self-reliant and globally competitive semiconductor industry by developing a complete manufacturing and design ecosystem within the country.

Industry representatives have welcomed the policy framework. Ashok Chandak, President of the India Electronics and Semiconductor Association (IESA) and SEMI India, stated that the quick transition from cabinet approval to official notification signals strong policy execution and commitment, providing the long-term confidence required for investments in an industry with 10 to 15-year horizons.

"The formal notification of Semicon 2.0 with a substantial ₹1,27,500-crore outlay provides the necessary structural clarity and long-term policy continuity that capital-intensive sectors require. For deeptech startups, component manufacturers, and design firms operating within the Indian ecosystem, this multi-pillar framework creates predictable pathways for funding, R&D collaboration, and talent acquisition. Aligning fiscal support with execution milestones on a pari-passu basis ensures accountability and builds sustainable manufacturing capabilities." — Dr. Shishir Gupta, Founder & CEO, StartupLanes